aboutsummaryrefslogtreecommitdiff
path: root/CH5xx_ble_firmware_library/StdPeriphDriver/inc/CH58x_clk.h
blob: ed1984dd8684991f203615b8eb174023f1b76032 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
/********************************** (C) COPYRIGHT *******************************
 * File Name          : CH57x_clk.h
 * Author             : WCH
 * Version            : V1.2
 * Date               : 2021/11/17
 * Description
 *********************************************************************************
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * Attention: This software (modified or not) and binary are used for 
 * microcontroller manufactured by Nanjing Qinheng Microelectronics.
 *******************************************************************************/

#ifndef __CH58x_CLK_H__
#define __CH58x_CLK_H__

#ifdef __cplusplus
extern "C" {
#endif

/**
 * @brief  ϵͳÖ÷Ƶ¶¨Òå
 */
typedef enum
{
    CLK_SOURCE_LSI = 0x00,
    CLK_SOURCE_LSE,

    CLK_SOURCE_HSE_16MHz = 0x22,
    CLK_SOURCE_HSE_8MHz = 0x24,
    CLK_SOURCE_HSE_6_4MHz = 0x25,
    CLK_SOURCE_HSE_4MHz = 0x28,
    CLK_SOURCE_HSE_2MHz = (0x20 | 16),
    CLK_SOURCE_HSE_1MHz = (0x20 | 0),

    CLK_SOURCE_PLL_80MHz = 0x46,
    CLK_SOURCE_PLL_60MHz = 0x48,
    CLK_SOURCE_PLL_48MHz = (0x40 | 10),
    CLK_SOURCE_PLL_40MHz = (0x40 | 12),
    CLK_SOURCE_PLL_36_9MHz = (0x40 | 13),
    CLK_SOURCE_PLL_32MHz = (0x40 | 15),
    CLK_SOURCE_PLL_30MHz = (0x40 | 16),
    CLK_SOURCE_PLL_24MHz = (0x40 | 20),
    CLK_SOURCE_PLL_20MHz = (0x40 | 24),
    CLK_SOURCE_PLL_15MHz = (0x40 | 0),
} SYS_CLKTypeDef;

/**
 * @brief  32KʱÖÓÑ¡Ôñ
 */
typedef enum
{
    Clk32K_LSI = 0,
    Clk32K_LSE,

} LClk32KTypeDef;

/**
 * @brief  32M¾§ÕñµçÁ÷µ²Î»
 */
typedef enum
{
    HSE_RCur_75 = 0,
    HSE_RCur_100,
    HSE_RCur_125,
    HSE_RCur_150

} HSECurrentTypeDef;

/**
 * @brief  32M¾§ÕñÄÚ²¿µçÈݵ²Î»
 */
typedef enum
{
    HSECap_10p = 0,
    HSECap_12p,
    HSECap_14p,
    HSECap_16p,
    HSECap_18p,
    HSECap_20p,
    HSECap_22p,
    HSECap_24p

} HSECapTypeDef;

/**
 * @brief  32K¾§ÕñµçÁ÷µ²Î»
 */
typedef enum
{
    LSE_RCur_70 = 0,
    LSE_RCur_100,
    LSE_RCur_140,
    LSE_RCur_200

} LSECurrentTypeDef;

/**
 * @brief  32K¾§ÕñÄÚ²¿µçÈݵ²Î»
 */
typedef enum
{
    LSECap_2p = 0,
    LSECap_13p,
    LSECap_14p,
    LSECap_15p,
    LSECap_16p,
    LSECap_17p,
    LSECap_18p,
    LSECap_19p,
    LSECap_20p,
    LSECap_21p,
    LSECap_22p,
    LSECap_23p,
    LSECap_24p,
    LSECap_25p,
    LSECap_26p,
    LSECap_27p

} LSECapTypeDef;

#define MAX_DAY                   0x00004000
#define MAX_2_SEC                 0x0000A8C0
//#define	 MAX_SEC		0x545FFFFF

#define BEGYEAR                   2020
#define IsLeapYear(yr)            (!((yr) % 400) || (((yr) % 100) && !((yr) % 4)))
#define YearLength(yr)            (IsLeapYear(yr) ? 366 : 365)
#define monthLength(lpyr, mon)    (((mon) == 1) ? (28 + (lpyr)) : (((mon) > 6) ? (((mon) & 1) ? 31 : 30) : (((mon) & 1) ? 30 : 31)))

/**
 * @brief  rtc timer mode period define
 */
typedef enum
{
    Period_0_125_S = 0, // 0.125s ÖÜÆÚ
    Period_0_25_S,      // 0.25s ÖÜÆÚ
    Period_0_5_S,       // 0.5s ÖÜÆÚ
    Period_1_S,         // 1s ÖÜÆÚ
    Period_2_S,         // 2s ÖÜÆÚ
    Period_4_S,         // 4s ÖÜÆÚ
    Period_8_S,         // 8s ÖÜÆÚ
    Period_16_S,        // 16s ÖÜÆÚ
} RTC_TMRCycTypeDef;

/**
 * @brief  rtc interrupt event define
 */
typedef enum
{
    RTC_TRIG_EVENT = 0, // RTC ´¥·¢Ê¼þ
    RTC_TMR_EVENT,      // RTC ÖÜÆÚ¶¨Ê±Ê¼þ

} RTC_EVENTTypeDef;

/**
 * @brief  rtc interrupt event define
 */
typedef enum
{
    RTC_TRIG_MODE = 0, // RTC ´¥·¢Ä£Ê½
    RTC_TMR_MODE,      // RTC ÖÜÆÚ¶¨Ê±Ä£Ê½

} RTC_MODETypeDef;

typedef enum
{
    /* У׼¾«¶ÈÔ½¸ß£¬ºÄʱԽ³¤ */
    Level_32 = 3, // ÓÃʱ 1.2ms 1000ppm (32M Ö÷Ƶ)  1100ppm (60M Ö÷Ƶ)
    Level_64,     // ÓÃʱ 2.2ms 800ppm  (32M Ö÷Ƶ)  1000ppm (60M Ö÷Ƶ)
    Level_128,    // ÓÃʱ 4.2ms 600ppm  (32M Ö÷Ƶ)  800ppm  (60M Ö÷Ƶ)

} Cali_LevelTypeDef;

/**
 * @brief   32K µÍƵʱÖÓÀ´Ô´
 *
 * @param   hc  - Ñ¡Ôñ32KʹÓÃÄÚ²¿»¹ÊÇÍⲿ
 */
void LClk32K_Select(LClk32KTypeDef hc);

/**
 * @brief   HSE¾§Ìå Æ«ÖõçÁ÷ÅäÖÃ
 *
 * @param   c   - 75%,100%,125%,150%
 */
void HSECFG_Current(HSECurrentTypeDef c);

/**
 * @brief   HSE¾§Ìå ¸ºÔصçÈÝÅäÖÃ
 *
 * @param   c   - refer to HSECapTypeDef
 */
void HSECFG_Capacitance(HSECapTypeDef c);

/**
 * @brief   LSE¾§Ìå Æ«ÖõçÁ÷ÅäÖÃ
 *
 * @param   c   - 70%,100%,140%,200%
 */
void LSECFG_Current(LSECurrentTypeDef c);

/**
 * @brief   LSE¾§Ìå ¸ºÔصçÈÝÅäÖÃ
 *
 * @param   c   - refer to LSECapTypeDef
 */
void LSECFG_Capacitance(LSECapTypeDef c);

void Calibration_LSI(Cali_LevelTypeDef cali_Lv); /* ÓÃÖ÷ƵУ׼ÄÚ²¿32KʱÖÓ */

/**
 * @brief   RTCʱÖÓ³õʼ»¯µ±Ç°Ê±¼ä
 *
 * @param   y       - ÅäÖÃÄ꣬MAX_Y = BEGYEAR + 44
 * @param   mon     - ÅäÖÃÔ£¬MAX_MON = 12
 * @param   d       - ÅäÖÃÈÕ£¬MAX_D = 31
 * @param   h       - ÅäÖÃСʱ£¬MAX_H = 23
 * @param   m       - ÅäÖ÷ÖÖÓ£¬MAX_M = 59
 * @param   s       - ÅäÖÃÃ룬MAX_S = 59
 */
void RTC_InitTime(uint16_t y, uint16_t mon, uint16_t d, uint16_t h, uint16_t m, uint16_t s);

/**
 * @brief   »ñÈ¡µ±Ç°Ê±¼ä
 *
 * @param   py      - »ñÈ¡µ½µÄÄ꣬MAX_Y = BEGYEAR + 44
 * @param   pmon    - »ñÈ¡µ½µÄÔ£¬MAX_MON = 12
 * @param   pd      - »ñÈ¡µ½µÄÈÕ£¬MAX_D = 31
 * @param   ph      - »ñÈ¡µ½µÄСʱ£¬MAX_H = 23
 * @param   pm      - »ñÈ¡µ½µÄ·ÖÖÓ£¬MAX_M = 59
 * @param   ps      - »ñÈ¡µ½µÄÃ룬MAX_S = 59
 */
void RTC_GetTime(uint16_t *py, uint16_t *pmon, uint16_t *pd, uint16_t *ph, uint16_t *pm, uint16_t *ps);

/**
 * @brief   »ùÓÚLSE/LSIʱÖÓ£¬ÅäÖõ±Ç°RTC ÖÜÆÚÊý
 *
 * @param   cyc     - ÅäÖÃÖÜÆÚ¼ÆÊý³õÖµ£¬MAX_CYC = 0xA8BFFFFF = 2831155199
 */
void RTC_SetCycle32k(uint32_t cyc);

/**
 * @brief   »ùÓÚLSE/LSIʱÖÓ£¬»ñÈ¡µ±Ç°RTC ÖÜÆÚÊý
 *
 * @return  µ±Ç°ÖÜÆÚÊý£¬MAX_CYC = 0xA8BFFFFF = 2831155199
 */
uint32_t RTC_GetCycle32k(void);

/**
 * @brief   RTC¶¨Ê±Ä£Ê½ÅäÖã¨×¢Òⶨʱ»ù×¼¹Ì¶¨Îª32768Hz£©
 *
 * @param   t   - refer to RTC_TMRCycTypeDef
 */
void RTC_TRIGFunCfg(uint32_t cyc);

/**
 * @brief   RTC¶¨Ê±Ä£Ê½ÅäÖã¨×¢Òⶨʱ»ù×¼¹Ì¶¨Îª32768Hz£©
 *
 * @param   t   - refer to RTC_TMRCycTypeDef
 */
void RTC_TMRFunCfg(RTC_TMRCycTypeDef t);

/**
 * @brief   RTC ģʽ¹¦ÄܹرÕ
 *
 * @param   m   - ÐèÒª¹Ø±ÕµÄµ±Ç°Ä£Ê½
 */
void RTC_ModeFunDisable(RTC_MODETypeDef m);

/**
 * @brief   »ñÈ¡RTCÖжϱêÖ¾
 *
 * @param   f   - refer to RTC_EVENTTypeDef
 *
 * @return  Öжϱê־״̬
 */
uint8_t RTC_GetITFlag(RTC_EVENTTypeDef f);

/**
 * @brief   Çå³ýRTCÖжϱêÖ¾
 *
 * @param   f   - refer to RTC_EVENTTypeDef
 */
void RTC_ClearITFlag(RTC_EVENTTypeDef f);

#ifdef __cplusplus
}
#endif

#endif // __CH58x_CLK_H__